Tuesday, 6 November 2018

Intel Announces 48-Core Cascade Lake Xeon CPUs With 12 Memory Channels

Intel’s server roadmap and product families have been pretty calm in recent years. The company reorganized its server chips into the Xeon Scalable family and away from the old E7/E5/E3 designations in 2017, and it overhauled the Core X series, but it hasn’t made any dramatic changes to Xeon since AMD launched the Epyc family. Those changes are apparently coming in the first half of 2019, with the launch of Intel’s latest high-end Xeon parts, Cascade Lake Advanced Performance. Unlike standard Cascade Lake chips, these chips will offer substantially more cores and support for up to 2-socket systems.
Intel’s current line of Xeon Scalable Processors like the Xeon Platinum 8180, top out at 28 CPU cores. The new Cascade Lake AP chips, on the other hand, will pack up to 48 cores using an MCM. Intel hasn’t unveiled any details on its interconnect yet, though it seems incredibly likely to leverage Intel’s own EMIB (Embedded Multi-die Interconnect Bridge). EMIB is already used on Intel’s Hades Canyon / Kaby Lake “G” silicon, and we suspect it’ll be used here as well. Details of how Intel will connect the MCMs together or how many cores are in each chiplet — that’s the sort of detail we don’t have yet.
It’s not surprising to see Intel making this move. When AMD had 32-core CPUs in-market, Intel’s monolithic 28-core chips, with their higher IPCs, weren’t at an automatic disadvantage. But AMD is widely expected to push as high as 64 cores with next-generation Epyc, and we’ve known for years that Intel wouldn’t keep fielding monolithic chips forever.
Intel predicts performance that’s 1.21x better in Linpack than Xeon Scalable 8180 (3.4x better than AMD Epyc 7601), 1.83x better in Stream Triad (1.3x better than Epyc 7601), and a 17x improvement in AI/Deep Learning inference compared with Xeon Platinum at launch. We don’t have a launch date for Cascade Lake other than 1H, so it’s a good bet that whatever Intel fields will go head-to-head with AMD’s Epyc 2 silicon, codenamed Rome, and built on 7nm at TSMC. As large as 12 memory channels is, it’s not crazy — as CPU core counts scale upwards, motherboards need more memory channels just to keep things relatively balanced.
Like standard Cascade Lake, Cascade Lake AP will feature support for Intel Optane Persistent Memory DIMMs and the hardware-level fixes for problems like Spectre and Meltdown. In the absence of a formal release date, we’re betting these chips don’t tip up much before summer — by which point they should have company from AMD.

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